The present invention relates to a switching circuit and, for example, to the art which is effective in application to a CMOS type or Bi-CMOS type semiconductor integrated circuit device having level compatibility with an ECL (emitter coupled logic).
Development in the art for combining a bipolar transistor and a complementary MOSFET (CMOS), so-called the Bi-CMOS technique has made it possible to realize a high speed and low power consumption LSI (large scale integrated circuit device). According to this technique, an LSI which assures high speed operation like a bipolar IC and low power consumption like a CMOSLSI. This art is described, for example, in the magazine, "NIKKEI ELECTRONICS" p187.about.p208, issued on August 12, 1985 by NIKKEI McGrawhill.